Workshop on 5G NR modelling with MATLAB on 21 January

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MathWorks will organise a workshop on 5G NR modelling with MATLAB on Thursday 21 January.

Join the workshop on Teams by using this link


Agenda Outline: 

  • Session #1 (8.30 – 10.00): 5G Physical Layer Modelling
    • Coffee Break (10:00 – 10:30)
  • Session #2 (10.30 – 12.00): Antennas, RF, and Hybrid Beamforming
    • Lunch break (12:00 – 13:00)
  • Session #3 (13.00 – 14.30): Link Analysis and Raytracing
    • Coffee Break (14:30 – 15:00)
  • Session #4 (15.00 – 16.30): 5G NR Hardware Implementation Running on an FPGA


Detailed agenda:

Session #1 (8.30 – 10.00): 5G Physical Layer Modeling

Session #1 is all about 5G specific signal processing.

We talk about the standard itself and show how 5G Toolbox have all the functionality built-in to model and simulate the 5G New Radio (NR) physical layer (PHY). Standard-compliant models in MATLAB are implemented to explore the behavior of 5G physical layer systems or components.

– Uplink and downlink 5G NR waveform generation including pre-defined (test models, FRCs) and full custom waveforms
– Mixed numerology, CP-OFDM, and SC-FDMA
– Modeling of 5G uplink and downlink physical channels and signals such as PDSCH/PUSCH, PDCCH/PUCCH, synchronization burst, DMRS (demodulation reference signals), CSI-RS, SRS, and PT-RS
– Channel models as specified in TR 38.901 including tapped delay line (TDL) and clustered delay line (CDL)
– Link-level simulation reference design, enabling you to measure throughput of a downlink (PDSCH) or an uplink (PUSCH) 5G link over 2-D or 3-D channel model
– Synchronization procedures including cell search and MIB decoding

Session #2 (10.30 – 12.00): Antennas, RF, and Hybrid Beamforming

Session #2 is about the antenna arrays that are typically used in 5G.

We will see how spatial multiplexing can be used to create multiple subchannels in the scatterer rich environment so multiple data streams can be transmitted and recovered independently. This is achieved by applying a set of precoding and combining weights derived from the channel matrix. With large antenna arrays, it is not always practical due to cost and power budgets, to apply digital weights on each antenna element. Hybrid beamforming can be used to address this issue.

– Develop an antenna array and visualizing the geometry, and 2D and 3D directivity
– Import antenna patterns to increase model fidelity
– Design spatial multiplexing system to increase channel capacity with MIMO operations
– Partition beamforming function between the RF and digital domains in hybrid beamforming architectures
– Design array architectures, generate RF phase shifts and digital complex weights, and evaluate the results

Session #3 (13.00 – 14.30): Link Analysis and Raytracing

In session #3, we talk about the channel model.

You will learn how to use ray-tracing and determine coverage and communication links performance. We will position an antenna array on a 3D map, use different propagation models, and account for terrain elevation and atmospheric conditions. You will see how beamforming and ray tracing can be used to improve coverage and establish transmitter-receiver links at mmWave frequencies.

– Analyze the impact of buildings through ray tracing techniques
– Install antenna arrays on maps and analyze the antenna performance including propagation effect
– Design antennas and antenna arrays and integrate them earlier at the system-level

Session #4 (15.00 – 16.30): 5G NR Hardware Implementation Running on an FPGA

In the last part of the day, session #4, we will move outside the comfortable world of MATLAB simulations and talk about how a 5G system can actually be implemented and run in real-time on real hardware.

We will target an FPGA prototyping board by using hardware-proven IP and reference applications, and look at some aspects that need to be considered when creating a System-On-Chip.

– Fixed-point data types
– How to target real hardware: workflow and methodology
– Ready-made 5G IP blocks
– Overview of a 5G NR Cell Search reference application
– Targeting Xilinx Zynq-based hardware